Single and dual input packaged 5.5–6.5GHz, 20W, Quasi-MMIC GaN-HEMT Doherty Power Amplifier

Single and dual input packaged 5.5–6.5GHz, 20W, Quasi-MMIC GaN-HEMT Doherty Power Amplifier
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单输入和双输入封装 5.5–6.5GHz、20W、准 MMIC GaN-HEMT Doherty 功率放大器

DOI:
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发表时间:
2017
期刊:
Intelligent Memory Systems
影响因子:
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通讯作者:
D. Barataud
D. Barataud
中科院分区:
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文献类型:
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作者:
M. Ayad;E. Byk;G. Neveux;M. Camiade;D. Barataud

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本文介绍了工作在5.5-6.5GHz带宽的低成本塑料封装对称Doherty功率放大器(DPA)的设计、实现及其功率特性。提出了一种基于两个GaN HEMT单元(8个指状物,单位栅宽275μm)组成的两个功率条的单输入(SI-DPA)和双输入(DI-DPA)DPA。采用无源GaAs MMIC工艺设计了输入输出匹配网络。据我们所知,这是第一个发表的SI和DI-DPA工作在C波段,采用准MMIC技术设计和塑料封装组装。在5.5-6.5GHz带宽内,连续波(CW)信号下,SI-DPA的最大输出功率(Pout)大于20 W(43.5dBm),漏极效率(dE)为50%,功率附加效率(PAE)为42%,插入增益(GI)为11 dB。在6dB输出功率回退(oBo)下,漏极效率大于35%(32%PAE)。采用30 MHz带宽的256 QAM调制信号,采用数字预失真(DPD)技术,在平均输出功率为34 dBm时,邻道泄漏比(ACLR)为50 dBc。所设计的DI-DPA与没有输入功率分配器的SI-DPA相同。它表明,与适当的偏置点相关联的主放大器和峰值放大器之间的功率比的调整,改善了所有的功率性能:线性度,PAE,oBo和GI。DI-DPA达到12.5 dB GI,最大Pout等于44 dBm(3.5dB增益压缩),PAE为45%。此外,在相同的先前带宽下,在6dBoBo处获得40%PAE(AM/PM = 4°变化),在8dBoBo处获得36%PAE(AM/PM=3°)。
This paper presents the design, the realization and the power characteristics of plastic low cost packaged symmetric Doherty Power Amplifiers (DPA) operating in the 5.5–6.5GHz bandwidth. A single input (SI-DPA) and a dual input (DI-DPA) DPAs are proposed based on two power bars composed of two GaN HEMT cells (8 fingers of 275μm unit gate width). Input and output matching networks are designed on passive GaAs MMIC technology. To our knowledge, it is the first published SI and DI-DPAs working in C band, designed using Quasi-MMIC technology and assembled in plastic package. The measured power results under Continuous Wave (CW) signal of the SI-DPA demonstrate a maximum output power (Pout) upper than 20W (43.5dBm) with 50% drain efficiency (dE), 42% power added efficiency (PAE), 11dB of insertion gain (GI) in the 5.5–6.5GHz bandwidth. At 6dB output power Back-off (oBo), the drain efficiency is greater than 35% (32% PAE). The DPA linearity has been investigated with a 256QAM modulation signal of 30MHz bandwidth and using Digital Pre-Distortion (DPD) leading to a 50dBc Adjacent Channel Leakage Ratio (ACLR) at a 34 dBm average output power. The designed DI-DPA is identical to the SI-DPA without input power splitter. It demonstrates that the adjustment of power ratio between the main and the peak amplifiers associated with adequate bias points, improves all the power performances: linearity, PAE, oBo and GI. The DI-DPA reaches a 12.5 dB GI, a maximum Pout equal to 44dBm (3.5dB gain compression) with 45% PAE. Moreover, in the same previous bandwidth, 40% PAE with 4° of AM/PM variation are obtained at 6dBoBo and 36% PAE (AM/PM=3°) at 8dBoBo.