Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device
Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device
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DOI：
10.1109/aspdac.2012.6164968
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发表时间：
2012-03
期刊：
影响因子：
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通讯作者：
Meng-Fan Chang;C. Chuang;Min-Ping Chen;Lai-Fu Chen;H. Yamauchi;P. Chiu;S. Sheu
中科院分区：
文献类型：
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作者：
Meng-Fan Chang;C. Chuang;Min-Ping Chen;Lai-Fu Chen;H. Yamauchi;P. Chiu;S. Sheu
低电压电路和掉电模式的使用有助于降低芯片的功耗。非易失性逻辑（nvLogic）和非易失性SRAM（nvSRAM）使芯片能够保留其关键的本地状态和数据，同时提供比传统双宏方案更快的上电/断电速度。电阻存储器（忆阻器）器件具有写入速度快和写入功率低的特点。将忆阻器应用于nvLogic和nvSRAM，不仅使芯片能够实现低功耗存储操作，而且即使在突然断电的情况下，也能实现快速的上电/断电过程和可靠的操作。然而，当前忆阻器器件的耐久性有限，这影响了基于忆阻器的nvLogic和nvSRAM的电路结构的设计。此外，先前的nvLogic/nvSRAM电路不能实现低电压操作。本文探讨了nvLogic和nvSRAM的各种电路结构，考虑到忆阻器的耐久性，特别是在低电压应用中。
The use of low voltage circuits and power-off mode help to reduce the power consumption of chips. Non-volatile logic (nvLogic) and nonvolatile SRAM (nvSRAM) enable a chip to preserve its key local states and data, while providing faster power-on/off speeds than those available with conventional two-macro schemes. Resistive memory (memristor) devices feature fast write speed and low write power. Applying memristors to nvLogic and nvSRAMs not only enables chips to achieve low power consumption for store operations, but also achieve fast power-on/off processes and reliable operation even in the event of sudden power failure. However, current memristor devices suffer from limited endurance, which influences the design of the circuit structure for memristor-based nvLogic and nvSRAM. Moreover, previous nvLogic/nvSRAM circuits cannot achieve low voltage operation. This paper explores various circuit structures for nvLogic and nvSRAM, taking into account memristor endurance, especially for low-voltage applications.