FastLane Is Opaque - a Case Study in Mechanized Proofs of Opacity
FastLane Is Opaque - a Case Study in Mechanized Proofs of Opacity
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FastLane 是不透明的 - 机械化不透明证明的案例研究
DOI:
10.1007/978-3-319-92970-5_7
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发表时间:
2018
期刊:
影响因子:
--
通讯作者:
G. Schellhorn M. Wedel O. Travkin J. König H. Wehrheim
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文献类型:
--
作者:
G. Schellhorn M. Wedel O. Travkin J. König H. Wehrheim
Software Transactional Memory (STM) algorithms provide programmers with a high-level synchronization technique for concurrent programming. STMs guarantee “seemingly atomic” access to shared state via transactions. This seeming atomicity is the standard requirement on STM implementations and formalized in the concept ofopacity. The standard proof technique for opacity is viarefinement: the STM implementation is shown to refine an IO automaton called TMS2 which itself is known to be opaque.This paper presents a case study of proving opacity via TMS2 refinement. Our case study concerns theFastLaneimplementation of STM which is specifically designed to achieve good performance on varying contention: it supports different modes for low and high thread counts plus provides a switching scheme between modes. This basic concept provides new challenges for verification: besides having to prove opacity of every mode itself, we also need to show that switching does not invalidate opacity. For both parts, we present fully mechanized proofs of opacity carried out in the interactive theorem prover KIV.
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