A SiC Power MOSFET Loss Model Suitable for High-Frequency Applications
A SiC Power MOSFET Loss Model Suitable for High-Frequency Applications
复制标题
适用于高频应用的 SiC 功率 MOSFET 损耗模型
DOI：
10.1109/tie.2017.2703910
复制
发表时间：
2017-10-01
影响因子：
7.7
通讯作者：
She, Xu
中科院分区：
文献类型：
--
作者：
Li, Xuan;Jiang, Junning;She, Xu
减小的芯片尺寸和单极电流传导机制使碳化硅(SiC)金属氧化物半导体场效应晶体管(MOSFET)适合高频电力电子应用。对含有寄生元件的碳化硅功率MOSFET的开关过程进行建模，对于实现更高的效率和功率密度系统设计具有重要意义。为此，本文提出了一种新的简洁而准确的碳化硅功率MOSFET开关损耗模型。针对实验测量的局限性，在考虑输出电容COSS放电和充电的情况下，进行了数值模拟以验证所提出的模型的有效性。对于开关损耗，深入讨论了寄生分量在二阶模型中的作用。此外，本文还为超快碳化硅功率MOSFET的栅极驱动器的设计提供了指导。
The reduced chip size and unipolar current conduction mechanism make silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) suitable for high-frequency power electronics applications. Modeling the switching process of the SiC power MOSFET with parasitic components is important for achieving higher efficiency and power density system design. Therefore, this paper proposes a new concise yet accurate switching loss model for SiC power MOSFETs. Addressing the limitations in experimental measurements, numerical simulations are conducted to validate the proposed model taking the output capacitance Coss discharge and charge into consideration. The role of the parasitic components in the second-order model is discussed in depth for switching losses. Furthermore, this paper also provides guidelines in designing the gate driver for ultrafast SiC power MOSFETs.