Utilizing Process Variations for Reference Generation in a Flash ADC
Utilizing Process Variations for Reference Generation in a Flash ADC
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利用工艺变化在闪存 ADC 中生成参考信号
DOI：
10.1109/tcsii.2009.2019165
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发表时间：
2009
期刊：
影响因子：
--
通讯作者：
A. Alvandpour
中科院分区：
文献类型：
--
作者：
Timmy Sundström;A. Alvandpour
本文介绍了如何利用纳米级CMOS技术中不断增加的工艺变化来实现小而低功耗的高速模数转换器（adc）的实验研究。特别是，在采用90纳米CMOS的4位Flash ADC中，已经消除了对参考电压产生网络的需求，并且具有小型比较器。由过程变化引起的不匹配导致的本机比较器偏移量被用作参考电平的唯一来源，并且使用冗余来获得所需的分辨率。1.5-GS/s ADC的测量性能可与传统最先进的ADC相媲美，功耗为23mw。
This brief presents an experimental study on how to take advantage of the increasing process variations in nanoscale CMOS technologies to achieve small and low-power high-speed analog-to-digital converters (ADCs). Particularly, the need for a reference voltage generation network has been eliminated in a 4-bit Flash ADC in 90-nm CMOS, with small-sized comparators. The native comparator offsets, resulting from the process-variation-induced mismatch, are used as the only source of reference levels, and redundancy is used to acquire the desired resolution. The measured performance of the 1.5-GS/s ADC is comparable to traditional state-of-the art ADCs and dissipates 23 mW.