Sources of error in full-system simulation
Sources of error in full-system simulation
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DOI：
10.1109/ispass.2014.6844457
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发表时间：
2014-03
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影响因子：
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通讯作者：
Anthony Gutierrez;Joseph Pusdesris;R. Dreslinski;T. Mudge;Chander Sudanthi;C. D. Emmons;Mitchell Hayenga;N. Paver
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作者：
Anthony Gutierrez;Joseph Pusdesris;R. Dreslinski;T. Mudge;Chander Sudanthi;C. D. Emmons;Mitchell Hayenga;N. Paver
在这项工作中，我们调查了GEM5-A最先进的计算机模拟器中错误的源 - 通过对真实硬件平台进行验证：ARM Versatile Express TC2 TC2开发板。我们设计了一种自定义的GEM5配置，并对模拟器本身进行了几次更改，以使更匹配多功能Express TC2板。通过对模拟器进行的修改，我们能够实现SPEC CPU2006基准测试的平均运行时误差5％和平均绝对百分比运行时误差。对于PARSEC基准，我们的单核和双核运行分别达到平均百分比运行时误差为-11％和-12％，单一和双核运行的平均绝对百分比运行时误差为16％和17％。虽然先前的工作通常仅考虑运行时的准确性，但我们将调查扩展到包括几个关键的微体系统计数据，这表明我们可以平均在其中大多数的20％以内实现准确性。这些错误的大部分可能是通过建模相似但不是相同的组件来建模。
In this work we investigate the sources of error in gem5-a state-of-the-art computer simulator-by validating it against a real hardware platform: the ARM Versatile Express TC2 development board. We design a custom gem5 configuration and make several changes to the simulator itself in order to more closely match the Versatile Express TC2 board. With the modifications we make to the simulator, we are able to achieve a mean percentage runtime error of 5% and a mean absolute percentage runtime error of 13% for the SPEC CPU2006 benchmarks. For the PARSEC benchmarks we achieve a mean percentage runtime error of -11% and -12% for single and dual-core runs respectively, and a mean absolute percentage runtime error of 16% and 17% for single and dual-core runs respectively. While prior work typically considers only runtime accuracy, we extend our investigation to include several key microarchitectural statistics as well, showing that we can achieve accuracy within 20% on average for a majority of them. Much of this error is likely from modeling similar, but not identical components.