266–2133 MHz phase shifter using all-digital delay-locked loop and triangular-modulated phase interpolator for LPDDR4X interface
266–2133 MHz phase shifter using all-digital delay-locked loop and triangular-modulated phase interpolator for LPDDR4X interface
复制标题
使用全数字延迟锁定环和三角调制相位内插器的 266–2133 MHz 移相器，用于 LPDDR4X 接口
DOI：
10.1049/el.2017.1291
复制
发表时间：
2017
影响因子：
1.1
通讯作者：
Suhwan Kim
中科院分区：
文献类型：
--
作者：
Joo;Min;H. Ko;Y. Jeong;J. Park;Gi;D. Jeong;Suhwan Kim
提出了一种适用于LPDDR 4X接口的266-2133 MHz移相器，该移相器采用全数字延迟锁定环（DLL）和三角调制相位差（PI）来改善抖动和线性度。该DLL由两种DLL组成：一个全局DLL，以协助快速锁定;和一个本地DLL，它使用自适应窗口相位检测器和折叠延迟线，以减少抖动和提高线性度。PI采用三角调制时钟波形，在宽频率范围内实现良好的线性度。原型芯片采用65 nm CMOS工艺实现。经测试，延迟锁定环的抖动为3.08ps
RMS
/19.93 ps
pp
2133兆赫在2133 MHz处，移相器的差分非线性小于0.91LSB，功率效率约为2.7mW/GHz。
A 266-2133 MHz phase shifter is proposed for LPDDR4X interface, utilising an all-digital delay-locked loop (DLL) and a triangular-modulated phase interpolator (PI) to improve the jitter and linearity. The DLL consists of two kinds of DLLs: a global DLL to assist fast locking; and a local DLL which uses an adaptive-window phase detector and a folded delay line to reduce jitter and improve linearity. The PI uses a triangular-modulated clock waveform to achieve good linearity over a wide frequency range. The prototype chip is implemented in a 65 nm CMOS process. The measured jitter of the DLL is 3.08 ps
rms
/19.93 ps
pp
at 2133 MHz. The measured differential non-linearity of the phase shifter is <;0.91 LSB at 2133 MHz, and the power efficiency is about 2.7 mW/GHz.