Behavioral modeling phase-locked loops for mixed-mode simulation
Behavioral modeling phase-locked loops for mixed-mode simulation
复制标题
用于混合模式仿真的行为建模锁相环
DOI：
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发表时间：
1996
期刊：
影响因子：
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通讯作者：
R. Leonowich
中科院分区：
文献类型：
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作者：
B. Antao;F. El;R. Leonowich
锁相环（PLL）是一类应用广泛的反馈系统。PLL整体上可以被视为闭环伺服系统，由三个主要功能子系统组成：1）相位检测器，2）环路滤波器和3）电压/电流控制振荡器。锁相环的总体特性取决于具有混合模数实现的各个子系统的实现。在仿真PLL时，必须处理大多数实现的混合信号特性，以及在大量信号周期上仿真PLL的问题。长的仿真运行时间困扰着使用常规仿真器的PLL的仿真，有时使得这样的仿真不切实际。在本文中描述的方法，这些缺点是克服了使用的行为模型和混合信号仿真平台。本文提出了一种通用的混合模式行为级仿真方法，并推导了各种PLL的行为级仿真模型。自上而下和自下而上的建模范例说明通过使用实际的PLL设计的例子。仿真模型生成的AT&T贝尔实验室混合模拟-数字仿真器，ATTSIM。
Phase-locked Loops(PLLs) are a class of feedback systems with wide range of applications. A PLL in its entirety can be viewed as a closed-loop servosystem, comprised of three major functional subsystems; 1) Phase detectors, 2) Loop filters and 3) Voltage/Current controlled oscillators. The overall characteristics of the phase-locked loop are dependent on the realization of individual subsystems which have mixed analog-digital implementations. In simulating a PLL, one has to deal with the mixed-signal nature of most implementations, as well as the problem of simulating the PLL over a large number of signal cycles. Long simulation run times plague the simulation of a PLL using a conventional simulator, sometimes making such simulation impractical. In the methodology described in this paper, these drawbacks are overcome by the use of behavioral models and a mixed-signal simulation platform. This paper presents a general mixed-mode behavioral simulation methodology and the derivation of behavioral simulation models for various kinds of PLLs. The top-down and bottom-up modeling paradigms are illustrated through the use of examples of actual PLL designs. The simulation models are generated for the AT&T Bell Laboratories mixed analog-digital simulator, ATTSIM.