A VLSI Design of an Arrayed Pipelined Tomlinson-Harashima Precoder for MU-MIMO Systems
A VLSI Design of an Arrayed Pipelined Tomlinson-Harashima Precoder for MU-MIMO Systems
复制标题
用于 MU-MIMO 系统的阵列流水线 Tomlinson-Harashima 预编码器的 VLSI 设计
DOI:
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发表时间:
2013
期刊:
影响因子:
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通讯作者:
Yoshikazu Miyanaga
中科院分区:
文献类型:
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作者:
Kosuke Shimazaki;Shingo Yoshizawa;Yasuyuki Hatakawa;Tomoko Matsumoto;Satoshi Konishi;Yoshikazu Miyanaga