Simultaneous Multithreading in Mixed-Criticality Real-Time Systems

Simultaneous Multithreading in Mixed-Criticality Real-Time Systems
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DOI:
10.1109/rtas52030.2021.00030
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发表时间:
2021-05
期刊:
2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium (RTAS)
影响因子:
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通讯作者:
Joshua Bakita;Shareef Ahmed;S. Osborne;Stephen Tang;Jingyuan Chen;F. D. Smith;James H. Anderson
Joshua Bakita;Shareef Ahmed;S. Osborne;Stephen Tang;Jingyuan Chen;F. D. Smith;James H. Anderson
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其他
文献类型:
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作者:
Joshua Bakita;Shareef Ahmed;S. Osborne;Stephen Tang;Jingyuan Chen;F. D. Smith;James H. Anderson

文献摘要

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通过允许多个任务在同一计算核心上同时执行,同时多线程(SMT)可以实现增强的计算能力。尽管有好处,但由于担心在同一核心上运行的任务可能会对彼此进行不利的干扰,因此在实时系统上的使用大大避免了使用。在本文中,详细考虑了在混合批判性多项环境中使用SMT的安全性。为此,重新实施了一个名为MC2的开源框架(在Mudicore上具有混合危害性),该框架为缓解缓存和内存干扰提供了功能,以支持支持SMT能力的多核心平台上的SMT。创建了这个新的,可配置的$ \ mathrm {M} \ Mathrm {C}^{2} $变体,该$ act of taild of产生了几个最近提出的实时SMT调度程序的第一个操作系统实现,并将它们绑在一起并在混合批评上下文中将它们绑在一起。这些调度程序引入了新的空间隔离挑战,这需要在L2和L3缓存水平上引入隔离。由此产生的$ \ mathrm {M} \ Mathrm {C}^{2} $变体的功效通过三项实验努力进行了演示。第一个涉及使用各种基准套件获得执行数据,包括TacleBench,DIS,SD-VBS和Synthetic Microbenchs。第二个涉及进行一项大规模的间接知识可调度性研究,该研究通过收集的基准数据参数为参数,以阐明可调整性权衡。第三个涉及涉及案例研究任务系统的实验。在计划研究中,SMT的使用被证明能够将平台容量的平均因子提高1.32。在案例研究实验中,从未观察到对高度关键任务的截止日期。
Simultaneous multithreading (SMT) enables enhanced computing capacity by allowing multiple tasks to execute concurrently on the same computing core. Despite its benefits, its use has been largely eschewed in work on real-time systems due to concerns that tasks running on the same core may adversely interfere with each other. In this paper, the safety of using SMT in a mixed-criticality multicore context is considered in detail. To this end, a prior open-source framework called MC2 (mixedcriticality on multicore), which provides features for mitigating cache and memory interference, was re-implemented to support SMT on an SMT-capable multicore platform. The creation of this new, configurable $\mathrm{M}\mathrm{C}^{2}$ variant entailed producing the first operating-system implementations of several recently proposed real-time SMT schedulers and tying them together within a mixed-criticality context. These schedulers introduce new spatialisolation challenges, which required introducing isolation at both the L2 and L3 cache levels. The efficacy of the resulting $\mathrm{M}\mathrm{C}^{2}$ variant is demonstrated via three experimental efforts. The first involved obtaining execution data using a wide range of benchmark suites, including TACLeBench, DIS, SD-VBS, and synthetic microbenchmarks. The second involved conducting a large-scale overhead-aware schedulability study, parameterized by the collected benchmark data, to elucidate schedulability tradeoffs. The third involved experiments involving case-study task systems. In the schedulability study, the use of SMT proved capable of increasing platform capacity by an average factor of 1.32. In the case-study experiments, deadline misses of highly critical tasks were never observed.