Efficiency enhanced voltage multiplier circuit for RF energy harvesting
Efficiency enhanced voltage multiplier circuit for RF energy harvesting
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DOI：
10.1016/j.mejo.2015.11.012
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发表时间：
2016-02-01
影响因子：
2.2
通讯作者：
Halonen, Kari
中科院分区：
文献类型：
--
作者：
Chouhan, Shailesh Singh;Nurmi, Marko;Halonen, Kari
在这项工作中，提出了一个简单的级联方案的电压倍增器（VM）电路中使用的RF能量收集。结果，从传统的两级VM电路中消除了两个开关。实际上，传统的两级虚拟机电路是由两个标准差分驱动整流器级联而成。传统的和建议的架构已被设计和制造在一个标准的0.18 μ m CMOS技术。分别使用5k Ω、9k Ω、30k Ω和100k Ω的电阻器来模拟测量中的实际负载条件。根据功率转换效率（PCE）测量电路的性能，并且针对范围从20 dBm到0 dBm的RF输入功率进行该表征。测试结果表明，与传统的VM电路相比，该电路在较低输入RF功率水平下的功率转换效率性能得到了改善。在最好的情况下，建议的整流器表现出测得的最大功率转换效率为74%，在2 dBm的输入RF电平为5 k Ω的电阻性负载。(C)2015爱思唯尔有限公司版权所有。
In this work, a simple cascading scheme is proposed for the voltage multiplier (VM) circuit used in RF-energy harvesting. As a result, two switches are eliminated from a traditional two-stage VM circuit. In practice, the traditional two-stage VM circuit is formed by cascading of two standard differential drive rectifiers. The conventional and proposed architectures have been designed and fabricated in a standard 0.18 mu m CMOS technology. The resistors of values 5k Omega, 9k Omega, 30k Omega and 100k Omega respectively, were used to emulate practical load conditions in the measurement. The performance of the circuits was measured in terms of the power conversion efficiency (PCE), and this characterization was done for RF input power ranging from 20 dBm to 0 dBm. The measured results show that the power conversion efficiency performance at lower input RF power level has been improved in the proposed circuit as compared to the traditional VM circuit. In the best case, the proposed rectifier exhibits the measured maximum power conversion efficiency of 74% at the input RF level of 2 dBm for the resistive load of 5 k Omega. (C) 2015 Elsevier Ltd. All rights reserved.