An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function
An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function
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DOI：
10.1109/jssc.2018.2791460
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发表时间：
2018-03-01
影响因子：
5.4
通讯作者：
Seok, Mingoo
中科院分区：
文献类型：
--
作者：
Li, Jiangyi;Yang, Teng;Seok, Mingoo
本文提出了一种新的基于微处理器的片上系统（SoC）的能力，将SRAM中的指令缓存到环境温度传感器和物理不可克隆功能（PUF）。为了实现这种转换，我们扩展了原有的无互锁流水线级的微处理器指令集结构，并更新了SRAM的外围电路和流水线控制。所有的改变都是最小化的，以减少硬件开销和对原始微架构的影响。与实现用于低占空比感测和PUF的专用硬件的传统方法相比，所提出的变换方法节省了类似于9.8倍的硅面积，同时实现了与实现这些功能的现有技术相当的性能和鲁棒性。该方法的效率进行了验证与SoC原型在65 nm CMOS。
This paper presents a novel microprocessor-based system-on-chip (SoC) with the capability to transform SRAM in the instruction cache to an ambient temperature sensor and a physically unclonable function (PUF). For the transformation, we extend the original microprocessor without interlocked pipeline stages instruction set architecture and update SRAM peripheral circuits and pipeline control. All the changes are made minimally to reduce hardware overhead and the impact on the original microarchitecture. Compared to the conventional approach implementing dedicated hardware for low duty-cycle sensing and PUF, the proposed transformation approach saves similar to 9.8x silicon area while achieving the performance and robustness comparable to the state of the art in implementing those functions. The efficiency of the approach is verified with an SoC prototyped in a 65-nm CMOS.