Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator
Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator
复制标题
绝缘体上硅高压器件介质层的场增强
DOI：
10.1109/ted.2009.2028405
复制
发表时间：
2009-10-01
影响因子：
3.1
通讯作者：
Luo, Xiaorong
中科院分区：
文献类型：
--
作者：
Zhang, Bo;Li, Zhaoji;Luo, Xiaorong
基于包含界面电荷的电位移连续性定理，提出了绝缘体上硅(SOI)高压器件的增强型介质层场(ENDIF)。提出了三种增强介质层电场E-I以提高器件V-B、V-V垂直击穿电压的方法：1)使用具有高临界电场E-S的薄硅层，E-C；2)引入低介电常数介质埋层；以及3)在硅和介质层之间实现界面电荷。考虑硅的阈值能(T)，首次得到了E-S、E-C对硅层厚度t(S)的关系式，它随t(S)的减小而急剧增加，在t(S)=0.1um m时达到141V/mum，给出了E-I、V-B、V-V的表达式，与模拟和实验结果吻合较好。在ENDIF的基础上，给出了新的器件结构，并在实验上获得了300V/mum的双面沟槽SOI的E-I值。此外，ENDIF还很好地解释了几种传统的SOI器件。
Based on the continuity theorem of electric displacement including interface charges, the enhanced dielectric layer field (ENDIF) for silicon-on-insulator (SOI) high-voltage devices is proposed. The following three approaches for enhancing the dielectric layer electric field E-I to increase the vertical breakdown voltage of a device V-B,V-V are presented: 1) using a thin silicon layer with a high critical electric field E-S,E-C; 2) introducing a low-permittivity dielectric buried layer; and 3) implementing interface charges between the silicon and the dielectric layer. Considering the threshold energy of silicon epsilon(T), the formula of E-S,E-C on silicon layer thickness t(S) is first obtained, which increases sharply with a decrease of t(S), and reaches up to 141 V/mu m at t(S) = 0.1 mu m. Expressions for E-I and V-B,V-V are given, which agree well with simulative and experimental results. Based on the ENDIF, the new device structures are given, and an E-I value of 300 V/mu m has been experimentally obtained for double-sided trench SOI. Moreover, several conventional SOI devices are explained well by ENDIF.