Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap

Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap
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DOI:
10.1109/2944.541875
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发表时间:
1996-04
影响因子:
4.9
通讯作者:
A. Krishnamoorthy;D. Miller
A. Krishnamoorthy;D. Miller
中科院分区:
工程技术2区
文献类型:
--
作者:
A. Krishnamoorthy;D. Miller

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现在存在使用混合集成技术实现用于硅CMOSVLSI的密集表面-正常光互连的技术。决定所得到的光子芯片性能的关键因素是收发机设备阵列的成品率、接收器和发射器电路的灵敏度和功率消耗以及可用的总光功率预算。利用GaAs-AlGaAs多量子阱p-i-n二极管进行片上检测和调制是实现光电收发信机的一种有效手段。随着CMOS线宽的缩小和混合光电收发技术性能的提高,我们讨论了这种混合光电子VLSI技术的潜在扩展路线图。一个重要的普遍结论是,与电互连不同,这种直接连接到电子电路的密集光互连很可能能够在容量上进行扩展,以匹配未来CMOS技术改进的性能。
Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget available. The use of GaAs-AlGaAs multiple-quantum-well p-i-n diodes for on-chip detection and modulation is one effective means of implementing the optoelectronic transceivers. We discuss a potential roadmap for the scaling of this hybrid optoelectronic VLSI technology as CMOS linewidths shrink and the characteristics of the hybrid optoelectronic transceiver technology improve. An important general conclusion is that, unlike electrical interconnects, such dense optical interconnections directly to an electronic circuit will likely be able to scale in capacity to match the improved performance of future CMOS technology.