Deterministic Logic BIST for Transition Fault Testing
Deterministic Logic BIST for Transition Fault Testing
复制标题
用于转换故障测试的确定性逻辑 BIST
DOI：
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发表时间：
2006
期刊：
影响因子：
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通讯作者：
Michael Garbers
中科院分区：
文献类型：
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作者：
V. Gherman;H. Wunderlich;J. Schlöffel;Michael Garbers
内建自测试是一种有吸引力的方法来检测延迟故障，由于其固有的支持全速测试。确定性逻辑内建自测试（DLBIST）是一种成功应用于固定故障测试的技术。由于延迟故障比固定故障具有更低的随机模式可测性，因此增加了对DLBIST方案的需求。然而，延迟故障测试的扩展并不是微不足道的，因为这需要模式对的应用。因此，延迟故障测试预计需要更大的映射工作和逻辑开销比固定故障测试。在本文中，我们考虑了所谓的过渡故障模型，这是广泛使用的复杂性的原因。我们提出了一个扩展的DLBIST计划的过渡故障测试。功能调整用于生成所需的模式对。利用工业基准电路对扩展方案的效率进行了研究
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applied to stuck-at fault testing. As delay faults have lower random pattern testability than stuck-at faults, the need for DLBIST schemes is increased. Nevertheless, an extension to delay fault testing is not trivial, since this necessitates the application of pattern pairs. Consequently, delay fault testing is expected to require a larger mapping effort and logic overhead than stuck-at fault testing. In this paper, we consider the so-called transition fault model, which is widely used for complexity reasons. We present an extension of a DLBIST scheme for transition fault testing. Functional justification is used to generate the required pattern pairs. The efficiency of the extended scheme is investigated by using industrial benchmark circuits