The Effect of Spacer Thicknesses on Si-Based Resonant Interband Tunneling Diode Performance and Their Application to Low-Power Tunneling Diode SRAM Circuits
The Effect of Spacer Thicknesses on Si-Based Resonant Interband Tunneling Diode Performance and Their Application to Low-Power Tunneling Diode SRAM Circuits
复制标题
垫片厚度对硅基谐振带间隧道二极管性能的影响及其在低功耗隧道二极管SRAM电路中的应用
DOI：
10.1109/ted.2006.879678
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发表时间：
2006
影响因子：
3.1
通讯作者：
Phillip E. Thompson
中科院分区：
文献类型：
--
作者：
Niu Jin;Sung;Ronghua Yu;R.M. Heyns;Paul R. Berger;Phillip E. Thompson
制备了间隔层厚度为1 ~ 16 nm的硅基共振带间隧道二极管（RITD）。研究了间隔层厚度对峰谷电流比（PVCR）、峰值电流密度Jp和电压摆幅的影响。通过将隧道间隔层厚度增加到16 nm，获得了jp低至20 mA/cm2，相关PVCR为1.6的ritd，适用于低功率隧道二极管SRAM应用。先前报道的最高RITD Jp为218 kA/cm2，通过设计隧道间隔层厚度和掺杂密度，可以获得跨越近7个数量级的Jp，从而显示出巨大的灵活性，可以针对不同的电路应用（逻辑、内存和混合信号）优化Jp。利用本文开发的低电流密度RITD，演示了一种低待机功耗的面包板单晶体管隧道式SRAM （TSRAM）存储单元。这是使用si基ritd的基于si的TSRAM存储电路的第一份报告。结果显示了硅基隧道二极管在低功耗存储器应用中的潜力
Si-based resonant interband tunneling diodes (RITD) with spacer thicknesses varying from 1 to 16 nm were grown and fabricated. The effect of spacer thickness on the peak-to-valley current ratio (PVCR), peak current density Jp, and voltage swing was studied. By increasing the tunneling spacer thickness up to 16 nm, RITDs with a J p of as low as 20 mA/cm2 with an associated PVCR of 1.6 were obtained, which are suitable for low-power tunnel diode SRAM applications. With the previously reported highest RITD Jp of 218 kA/cm2, a Jp spanning nearly seven orders of magnitude can be obtained by engineering the tunneling spacer thickness and doping densities, thus demonstrating tremendous flexibility to optimize Jp for different circuit applications (logic, memory, and mixed-signal). Using a low-current-density RITD developed in this paper, a bread-boarded one-transistor tunneling-based SRAM (TSRAM) memory cell with low standby power consumption was demonstrated. This is the first report of a Si-based TSRAM memory circuit using Si-based RITDs. The result demonstrates the potential of Si-based tunnel diodes for low-power memory applications