Emission Analysis of Hardware Implementations
Emission Analysis of Hardware Implementations
复制标题
硬件实现的排放分析
DOI：
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发表时间：
2014
期刊：
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通讯作者：
C. Boit
中科院分区：
文献类型：
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作者：
Shahin Tajik;Dmitry Nedospasov;Clemens Helfmeier;Jean;C. Boit
今天，硬件实现是许多安全应用的基础，例如加密密码。这样的应用是使用相当大尺寸的复杂组合逻辑电路来实现的。因此，理解门级实现对攻击者来说至关重要。然而，硬件描述语言（HDL）的行为模型和门级网表很少用于特定的设计。直接在设备上执行软件以帮助理解实现是一种潜在的解决方案。然而，这在实践中可能是不可行的或完全不可能的，因为目标设备可能无法执行代码。目前，很少有作品提出了形式的动态门级分析的实际硬件实现。此外，目前基于物理分层和光学成像的逆向工程技术不能应用于可编程逻辑。在这项工作中，我们提出了第一个动态发射分析的硬件实现。该技术不需要任何关于申报器械的先验知识。此外，它不需要目标执行代码。硬件实现由基本原语组成，这些原语构成复杂硬件功能的构建块。通过单独地分析每个基元并关联对应的光学图像，可以识别每个基元的发射指纹。因此，可以重构设备的硬件实现。我们提出了一个共同的复杂可编程逻辑器件（CPLD）的实际结果。然而，相同的方法通常可以应用于硬件实现。
Today, hardware implementations are the basis for many security applications, such as cryptographic ciphers. Such applications are realized using complex combinatorial logic circuits of substantial size. Therefore, understanding the gate-level implementation can be crucial for the attacker. However, Hardware Description Language (HDL) behavioral models and gate-level net list are seldom available for a particular design. Executing software directly on the device to assist in understanding the implementation is one potential solution. However, this may either be infeasible or completely impossible in practice as target devices may be incapable of executing code. Currently, few works have proposed forms of dynamic gate-level analysis of the actual hardware implementations. Moreover, current reverse-engineering techniques based on physical delayering and optical imaging cannot be applied to programmable logic. In this work we present the first dynamic emission analysis of a hardware implementation. This technique does not require any prior knowledge about the target device. Furthermore, it does not require code to be executed by the target. Hardware implementations consist of basic primitives that form the building blocks of complex hardware functions. By individually analyzing each primitive and correlating the corresponding optical images, the emission fingerprint of each primitive can be identified. As a result the hardware implementation of the device can be reconstructed. We present practical results for a common Complex Programmable Logic Device (CPLD). However, the same approach can be applied to hardware implementations in general.