Thermally robust high quality HfN/HfO/sub 2/ gate stack for advanced CMOS devices
Thermally robust high quality HfN/HfO/sub 2/ gate stack for advanced CMOS devices
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适用于高级 CMOS 器件的耐热性高品质 HfN/HfO/sub 2/栅极堆叠
DOI：
10.1109/iedm.2003.1269175
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发表时间：
2003
期刊：
影响因子：
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通讯作者：
D. Kwong
中科院分区：
文献类型：
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作者：
H. Yu;J. Kang;J.D. Chen;C. Ren;Y.T. Hou;S. Whang;M. Li;D. Chan;K. Bera;C. Tung;A. Du;D. Kwong
我们首次报道了用于先进CMOS应用的热稳定和高质量的HfN/HfO/sub 2/栅极堆栈。由于HfN优异的氧扩散阻隔性和HfN/HfO/sub - 2/界面的热稳定性，HfN/HfO/sub - 2/栅极堆的EOT已成功降至小于10/spl / Aring/，即使经过1000/spl℃的RTA处理20 s，也具有优异的泄漏性、抗硼渗透性和长期可靠性，而无需在HfO/sub - 2/沉积前进行表面氮化处理。对于没有表面氮化的器件，迁移率显著提高。在1000/spl度/C RTA后，EOT和HfN/HfO/sub - 2/栅极堆栈的功函数变化可以忽略不计。
We report for the first time a thermally stable and high quality HfN/HfO/sub 2/ gate stack for advanced CMOS applications. Due to the superior oxygen diffusion barrier of HfN as well as the thermal stability of the HfN/HfO/sub 2/ interface, the EOT of the HfN/HfO/sub 2/ gate stack has been successfully scaled down to less than 10/spl Aring/ with excellent leakage, boron penetration immunity, and long-term reliability, even after 1000/spl deg/C RTA treatment for 20 s, without using surface nitridation prior to HfO/sub 2/ deposition. The mobility is improved significantly for devices without surface nitridation. Negligible change in both EOT and the work function of the HfN/HfO/sub 2/ gate stack are observed after 1000/spl deg/C RTA.