Test Compaction Under Bounded Transparent-Scan
Test Compaction Under Bounded Transparent-Scan
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有界透明扫描下测试压实
DOI：
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
I. Pomeranz
中科院分区：
文献类型：
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作者：
I. Pomeranz
本文研究了有界平行扫描的概念，以利用平行扫描的测试压缩能力，在显着降低传统的多重平行扫描测试的计算成本。标准扫描电路的扫描使能输入被视为常规主输入。这允许扫描移位和功能捕获周期的任意序列用作连续扫描序列的一部分，从而有助于测试压缩。然而，它也具有在测试应用过程的所有时钟周期上的顺序故障模拟的计算成本。使用有界的并行扫描，测试开始和结束时都有扫描输入和扫描输出操作，不需要模拟。在扫描操作之间，允许扫描移位和功能捕获周期的任意序列以支持测试压缩。本文提出了一种有界平行扫描下的测试压缩方法，并给出了基准电路的实验结果，以证明其有效性。
This paper studies the concept of bounded transparent-scan to take advantage of the test compaction capabilities of transparent-scan at the significantly lower computational cost of conventional multicycle tests. Transparent-scan considers the scan enable input of a standard-scan circuit as a regular primary input. This allows arbitrary sequences of scan shift and functional capture cycles to be used as part of a transparent-scan sequence, contributing to test compaction. However, it also has the computational cost of sequential fault simulation over all the clock cycles of the test application process. With bounded transparent-scan, tests start and end with scan-in and scan-out operations that do not need to be simulated. Between the scan operations, arbitrary sequences of scan shift and functional capture cycles are allowed to support test compaction. The paper develops a test compaction procedure under bounded transparent-scan, and presents experimental results for benchmark circuits to demonstrate its effectiveness.