Footprint-Aware Power Capping for Hybrid Memory Based Systems

Footprint-Aware Power Capping for Hybrid Memory Based Systems
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DOI:
10.1007/978-3-030-50743-5_18
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发表时间:
2020-05-22
期刊:
High Performance Computing
影响因子:
--
通讯作者:
Schulz M
Schulz M
中科院分区:
其他
文献类型:
--
作者:
Arima E;Hanawa T;Trinitis C;Schulz M

文献摘要

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高性能计算 (HPC) 系统在功耗和内存带宽/容量方面都面临着严重的限制。目前,这些限制已分别得到解决:为了在严格的功率约束下提高性能,功率上限(为组件/节点/作业设置功率限制)是必不可少的功能;为了增加内存带宽/容量,业界已开始支持混合主内存设计,该设计在一个计算节点中包含多种不同的技术,包括新兴内存(例如,3D 堆栈式 DRAM 或非易失性 RAM)。然而,很少有作品关注这两种趋势的结合。本文明确针对基于混合内存的 HPC 系统的电源管理,并基于以下观察:尽管系统软件努力优化此类系统上的数据分配,但当我们扩展应用程序的问题规模时,有效内存带宽可能会大大减少。因此,性能瓶颈组件会根据占用空间(或数据)大小而变化,从而也会更改节点中的最佳功率上限设置。受这一观察的启发,我们提出了一种称为 的电源管理概念,并提出了一个配置文件驱动的软件框架来实现它。我们在使用 HPC 基准的真实系统上进行的实验结果表明,我们的方法成功地根据占用空间大小正确设置功率上限,同时与最佳设置相比保持了约 93/96% 的性能/功率效率。
High Performance Computing (HPC) systems are facing severe limitations in both power and memory bandwidth/capacity. By now, these limitations have been addressed individually: to improve performance under a strict power constraint, power capping, which sets power limits to components/nodes/jobs, is an indispensable feature; and for memory bandwidth/capacity increase, the industry has begun to support hybrid main memory designs that comprise multiple different technologies including emerging memories (e.g., 3D stacked DRAM or Non-Volatile RAM) in one compute node. However, few works look at the combination of both trends. This paper explicitly targets power managements on hybrid memory based HPC systems and is based on the following observation: in spite of the system software’s efforts to optimize data allocations on such a system, the effective memory bandwidth can decrease considerably when we scale the problem size of applications. As a result, the performance bottleneck component changes in accordance with the footprint (or data) size, which then also changes the optimal power cap settings in a node. Motivated by this observation, we propose a power management concept called and a profile-driven software framework to realize it. Our experimental result on a real system using HPC benchmarks shows that our approach is successful in correctly setting power caps depending on the footprint size while keeping around 93/96% of performance/power-efficiency compared to the best settings.