Survey of Photonic and Plasmonic Interconnect Technologies for Intra-Datacenter and High-Performance Computing Communications

Survey of Photonic and Plasmonic Interconnect Technologies for Intra-Datacenter and High-Performance Computing Communications
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DOI:
10.1109/comst.2018.2839672
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发表时间:
2018-05
影响因子:
35.6
通讯作者:
C. Thraskias;E. N. Lallas;N. Neumann;L. Schares;B. Offrein;R. Henker;D. Plettemeier;F. Ellinger;J. Leuthold;Ioannis Tomkos
C. Thraskias;E. N. Lallas;N. Neumann;L. Schares;B. Offrein;R. Henker;D. Plettemeier;F. Ellinger;J. Leuthold;Ioannis Tomkos
中科院分区:
计算机科学1区
文献类型:
--
作者:
C. Thraskias;E. N. Lallas;N. Neumann;L. Schares;B. Offrein;R. Henker;D. Plettemeier;F. Ellinger;J. Leuthold;Ioannis Tomkos

文献摘要

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大型数据中心(DC)和高性能计算(HPC)系统需要越来越多的计算能力和更高的能源效率。它们已经消耗了兆瓦的电力,并且趋势的线性外推表明,为了满足未来的需求(例如百亿亿次计算),它们最终可能会导致不切实际的功耗场景。由于带宽密度和功耗限制,传统的基于互补金属氧化物半导体 (CMOS) 的电子互连预计无法满足预期的未来板对板和芯片对芯片(多芯片模块内)互连要求。然而,低功耗和高速基于光学的互连正在成为直流和高性能计算通信的替代品;它们为持续提高能源效率和带宽密度提供了独特的机会,尽管成本在最短的长度尺度上是一个挑战。另一方面,基于等离子体的互连由于其尺寸极小,为进一步扩展运行速度和能源效率提供了另一种有趣的解决方案。在器件层面,CMOS 兼容性也是一个重要问题,因为最终光子学或等离子体激元必须与电子器件共同集成。在本文中,我们调查了现有文献并比较了上述互连技术,以确定它们对高速和节能的片上和片外通信的适用性。本文提到了在以下互连距离层次结构中具有潜在应用的相对较短的链路:本地机架组、板对板、模块对模块、芯片对芯片以及片上连接。我们比较了不同的互连器件模块,包括低能量输出器件(例如激光器、调制器和 LED)、光电探测器、无源器件(即波导和耦合器)和电路(例如激光二极管驱动器、调制器驱动器、互阻抗和限幅放大器)。我们证明光子技术有潜力在短期内满足选定 HPC 和 DC 应用的要求。我们还提出,等离子体互连模块可以提供超紧凑的有源区域,从而实现高集成带宽密度和低器件电容,从而实现超高带宽操作,从而满足未来的应用需求。
Large scale data centers (DC) and high performance computing (HPC) systems require more and more computing power at higher energy efficiency. They are already consuming megawatts of power, and a linear extrapolation of trends reveals that they may eventually lead to unrealistic power consumption scenarios in order to satisfy future requirements (e.g., Exascale computing). Conventional complementary metal oxide semiconductor (CMOS)-based electronic interconnects are not expected to keep up with the envisioned future board-to-board and chip-to-chip (within multi-chip-modules) interconnect requirements because of bandwidth-density and power-consumption limitations. However, low-power and high-speed optics-based interconnects are emerging as alternatives for DC and HPC communications; they offer unique opportunities for continued energy-efficiency and bandwidth-density improvements, although cost is a challenge at the shortest length scales. Plasmonics-based interconnects on the other hand, due to their extremely small size, offer another interesting solution for further scaling operational speed and energy efficiency. At the device-level, CMOS compatibility is also an important issue, since ultimately photonics or plasmonics will have to be co-integrated with electronics. In this paper, we survey the available literature and compare the aforementioned interconnect technologies, with respect to their suitability for high-speed and energy-efficient on-chip and off-chip communications. This paper refers to relatively short links with potential applications in the following interconnect distance hierarchy: local group of racks, board to board, module to module, chip to chip, and on chip connections. We compare different interconnect device modules, including low-energy output devices (such as lasers, modulators, and LEDs), photodetectors, passive devices (i.e., waveguides and couplers) and electrical circuitry (such as laserdiode drivers, modulator drivers, transimpedance, and limiting amplifiers). We show that photonic technologies have the potential to meet the requirements for selected HPC and DC applications in a shorter term. We also present that plasmonic interconnect modules could offer ultra-compact active areas, leading to high integration bandwidth densities, and low device capacitances allowing for ultra-high bandwidth operation that would satisfy the application requirements further into the future.