A neuron-MOS parallel associator for high-speed CDMA matched filter

A neuron-MOS parallel associator for high-speed CDMA matched filter
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用于高速CDMA匹配滤波器的神经元-MOS并行关联器

DOI:
10.1109/iscas.1999.780741
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发表时间:
1999
期刊:
ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)
影响因子:
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通讯作者:
T. Shibata
T. Shibata
中科院分区:
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文献类型:
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作者:
Atsuhiko Okada;T. Shibata

文献摘要

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相似文献

采用神经元MOS(/spl nu/MOS)技术实现了CDMA系统中的匹配滤波器。基于/spl nu/MOS关联器的并行搜索结构,由采样和保持电路捕获的输入信号序列同时与具有相同PN(伪随机噪声)码的所有可能相移的模板组匹配。最大相关性是通过使用二进制搜索/spl nu/MOS赢家通吃电路的完全并行比较来检测的。这样的并行架构使我们能够执行非常快的峰值检测以及检测的第二和第三个相关峰所产生的多径延迟。此外,二进制搜索WTA提供了二进制代码中的匹配程度,从而实现了更高级的应用。例如,可以将系统级联成多级,并将其应用于更长码片长度的PN码。测试芯片制作在0.6-/spl μ/m的双多晶硅三金属CMOS技术和系统的基本操作已被实验证明。
Neuron MOS (/spl nu/MOS) technology has been applied to build a matched filter for CDMA. Based on the parallel search architecture of /spl nu/MOS associator, an input signal train captured by sample and hold circuits is simultaneously matched with a group of templates having all possible shifts in phase of an identical PN (pseudorandom noise) code. The maximum correlation is detected by fully parallel comparison using the binary-search /spl nu/MOS winner-take-all circuit. Such a parallel architecture enables us to perform very fast peak detection as well as the detection of second and third correlation peaks arising from multipath delays. Moreover, the binary-search WTA provides the degree of matching in a binary code, thus enabling more advanced applications. For instance, it is possible to cascade the system in multiple stages and apply it to much longer-chip-length PN codes. Test chips were fabricated in a 0.6-/spl mu/m double-poly triple-metal CMOS technology and the fundamental operation of the system has been experimentally demonstrated.