Value-driven Synthesis for Neural Network ASICs
Value-driven Synthesis for Neural Network ASICs
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DOI：
10.1145/3218603.3218634
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发表时间：
2018-07
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通讯作者：
Zhiyuan Yang;Ankur Srivastava-
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作者：
Zhiyuan Yang;Ankur Srivastava-
为了实现神经网络 (NN) 应用的低功耗和高性能评估，我们研究了用于综合神经网络 ASIC (NN-ASIC) 的新设计方法。 NN-ASIC 采用经过训练的神经网络并实现具有定制优化的芯片。了解神经网络拓扑和权重使我们能够开发常规 ASIC 无法实现的独特优化方案。在这项工作中，我们研究了两种类型的价值驱动优化乘法器，它们利用了突触权重的知识，并开发了一种算法，使用这些特殊乘法器而不是通用乘法器来合成经过训练的神经网络的乘法。使用多个深度神经网络评估所提出的方法。实验结果表明，与传统的 NNP 相比，我们提出的 NN-ASIC 可以在性能和能源效率（即能量延迟乘积的倒数）方面分别实现高达 6.5 倍和 55 倍的改进。
In order to enable low power and high performance evaluation of neural network (NN) applications, we investigate new design methodologies for synthesizing neural network ASICs (NN-ASICs). An NN-ASIC takes a trained NN and implements a chip with customized optimization. Knowing the NN topology and weights allows us to develop unique optimization schemes which are not available to regular ASICs. In this work, we investigate two types of value-driven optimized multipliers which exploit the knowledge of synaptic weights and we develop an algorithm to synthesize the multiplication of trained NNs using these special multipliers instead of general ones. The proposed method is evaluated using several Deep Neural Networks. Experimental results demonstrate that compared to traditional NNPs, our proposed NN-ASICs can achieve up to 6.5x and 55x improvement in performance and energy efficiency (i.e. inverse of Energy-Delay-Product), respectively.