On output response compression in the presence of unknown output values

On output response compression in the presence of unknown output values
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存在未知输出值时的输出响应压缩

DOI:
10.1145/513918.513985
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发表时间:
2002
期刊:
Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)
影响因子:
--
通讯作者:
S. Reddy
S. Reddy
中科院分区:
--
文献类型:
--
作者:
I. Pomeranz;S. Kundu;S. Reddy

文献摘要

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由于未知的初始状态或由于三态元件的存在,电路可能在输入序列的仿真期间产生未知的输出值。对于使用BIST测试的电路,未知的输出值使得不可能确定无故障电路的单个唯一签名。为了适应未知的输出值的BIST方案中,我们描述了一个过程,用于合成一个最小的逻辑块,用一个已知的常数取代未知的输出值。建议的程序,确保BIST计划将能够检测到所有的故障检测的输入序列应用到电路,同时允许一个单一的唯一的签名,以获得。
A circuit may produce unknown output values during simulation of an input sequence due to an unknown initial state or due to the existence of tri-state elements. For circuits tested using BIST, unknown output values make it impossible to determine a single unique signature for the fault free circuit. To accommodate unknown output values in a BIST scheme, we describe a procedure for synthesizing a minimal logic block that replaces unknown output values by a known constant. The proposed procedure ensures that the BIST scheme will be able to detect all the faults detectable by the input sequence applied to the circuit while allowing a single unique signature to be obtained.