Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation

Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation
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用于早期实时性能评估的主机编译多核系统仿真

DOI:
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发表时间:
2014
期刊:
TECS
影响因子:
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通讯作者:
A. Gerstlauer
A. Gerstlauer
中科院分区:
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文献类型:
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作者:
Parisa Razaghi;A. Gerstlauer

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随着复杂性和软件内容的增加,现代嵌入式平台采用多核处理器和硬件加速器的异类混合,以便在有限的功率预算中提供高性能。为了评估实时性能和其他约束,全系统仿真是必不可少的。由于传统的方法要么速度慢,要么不准确,最近出现了所谓的源代码级或宿主编译的模拟器,作为在早期设计阶段快速评估整个系统的解决方案。在这些方法中,通过抽象执行行为和增加仿真粒度来实现更快的仿真。然而,现有的源代码级模拟器往往只关注应用程序的行为,而忽略了硬件/软件交互的影响及其相关的速度和精度权衡。 在本文中,我们提供了一个主机编译的模拟器,它在全系统环境中模拟软件执行。我们的模拟器结合了实时操作系统(RTOS)和多核处理器的抽象模型,以复制精确计时的硬件/软件交互,并实现完整的系统协同模拟。一种用于自动定时粒度调整(ATGA)的集成方法使用对系统状态的观察来自动控制定时模型,并优化导航速度与精度条件。应用于工业强度平台的结果证实,操作系统和系统级别的影响可以显著提高总体精度和模拟开销。通过提供仔细的抽象,我们的模型可以在等效速度超过1000 MIPS的情况下实现全系统仿真,而时序误差小于3%。再加上轻松调整模拟参数和配置的能力,这证明了我们的模拟器对于早期应用程序开发和设计空间探索的好处。
With increasing complexity and software content, modern embedded platforms employ a heterogeneous mix of multicore processors along with hardware accelerators in order to provide high performance in limited power budgets. To evaluate real-time performance and other constraints, full system simulations are essential. With traditional approaches being either slow or inaccurate, so-called source-level or host-compiled simulators have recently emerged as a solution for rapid evaluation of the complete system at early design stages. In such approaches, a faster simulation is achieved by abstracting execution behavior and increasing simulation granularity. However, existing source-level simulators often focus on application behavior only while neglecting the effects of hardware/software interactions and their associated speed and accuracy trade-offs. In this article, we present a host-compiled simulator that emulates software execution in a full-system context. Our simulator incorporates abstract models of both real-time operating systems (RTOSs) and multicore processors to replicate timing-accurate hardware/software interactions and to enable full system cosimulation. An integrated approach for automatic timing granularity adjustment (ATGA) uses observations of the system state to automatically control the timing model and optimally navigate speed versus accuracy conditions. Results as applied to industrial-strength platforms confirm that OS- and system-level effects can significantly contribute to overall accuracy and simulation overhead. By providing careful abstractions, our models can achieve full system simulations at equivalent speeds of more than a thousand MIPS with less than 3% timing error. Coupled with the capability to easily adjust simulation parameters and configurations, this demonstrates the benefits of our simulator for early application development and design space exploration.