Double-Precision FPUs in High-Performance Computing: An Embarrassment of Riches?
Double-Precision FPUs in High-Performance Computing: An Embarrassment of Riches?
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高性能计算中的双精度 FPU：财富的尴尬？
DOI：
10.1109/ipdps.2019.00019
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
S. Matsuoka
中科院分区：
文献类型：
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作者：
Jens Domke;Kazuaki Matsumura;M. Wahib;Haoyu Zhang;Keita Yashima;Toshiki Tsuchikawa;Yohei Tsuji;Artur Podobas;S. Matsuoka
在高性能计算中（HPC）中（无构造的）共同智慧中，应用程序需要在硬件中对大量的双精度支持。毫无疑问，硬件制造商，前500名列表和（很少重新访问的）旧软件（很少被重新访问）的旧软件遵循并为此观点做出了贡献。在本文中，我们挑战了这一智慧，并通过对两个处理器上的大量HPC代理应用进行了详尽的比较：英特尔的骑士着陆（KNL）和骑士磨坊（KNM）。尽管相似，但KNL和KNM的建筑在一个重要时刻偏离：硅区域专门用于双精度算术。这种幸运的差异使我们能够从经验上量化降低硬件双重精确算术量的性能影响。我们的分析表明，这种共同的智慧可能并不总是正确的。我们发现，所研究的HPC代理应用程序确实允许（显着）减少双重精确，而无需效果。随着摩尔定律失败的出现，我们的结果部分加强了现代行业（例如即将到来的富士通ARM64FX）所采取的观点，以整合混合精确的硬件单位。
Among the (uncontended) common wisdom in High-Performance Computing (HPC) is the applications' need for large amount of double-precision support in hardware. Hardware manufacturers, the TOP500 list, and (rarely revisited) legacy software have without doubt followed and contributed to this view. In this paper, we challenge that wisdom, and we do so by exhaustively comparing a large number of HPC proxy applications on two processors: Intel's Knights Landing (KNL) and Knights Mill (KNM). Although similar, the KNL and KNM architecturally deviate at one important point: the silicon area devoted to double-precision arithmetics. This fortunate discrepancy allows us to empirically quantify the performance impact in reducing the amount of hardware double-precision arithmetic. Our analysis shows that this common wisdom might not always be right. We find that the investigated HPC proxy applications do allow for a (significant) reduction in double-precision with little-to-no performance implications. With the advent of a failing of Moore's law, our results partially reinforce the view taken by modern industry (e.g., upcoming Fujitsu ARM64FX) to integrate hybrid-precision hardware units.