The power of reachability testing for timed automata

The power of reachability testing for timed automata
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DOI:
10.1016/s0304-3975(02)00334-1
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发表时间:
2003-05-07
影响因子:
1.1
通讯作者:
Larsen, KG
Larsen, KG
中科院分区:
计算机科学4区
文献类型:
--
作者:
Aceto, L;Bouyer, P;Larsen, KG

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验证工具的计算引擎由一系列有效的算法组成,用于分析系统的可及性能。目前可以在以下工具中对属性以外的其他属性进行模型检查。给定对模型检查的属性PHI,用户必须为其提供测试自动机T-PHI。该测试自动机必须使原始系统S具有PHI表达的属性,而当s与t-Phi的同步平行组成中无法达到t-Phi的尊重状态。这就提出了一个问题,即以这种方式可以通过Uppaal分析哪些属性。本文通过提供了可以将模型检查可以简化为上述意义上的可及性测试的属性类别的完整表征来回答这个问题的。该结果作为与本研究中考虑的财产语言的组成性有关的更强有意见的必然性。特别是,这表明我们的语言是表达最低表达性的构图语言,可以表达一个简单的安全性,表明无法达到拒绝状态。在本质上,使用可及性测试能力的属性语言用于提供一个定义关于无tau,确定性定时自动机的节点的预定模拟预订的定时版本的特征属性。 (c)2002 Elsevier Science B.V.保留所有权利。
The computational engine of the verification tool UPPAAL consists of a collection of efficient algorithms for the analysis of reachability properties of systems. Model-checking of properties other than plain reachability ones may currently be carried out in such a tool as follows. Given a property phi to model-check, the user must provide a test automaton T-phi for it. This test automaton must be such that the original system S has the property expressed by phi precisely when none of the distinguished reject states of T-phi can be reached in the synchronized parallel composition of S with T-phi. This raises the question of which properties may be analysed by UPPAAL in such a way. This paper gives an answer to this question by providing a complete characterization of the class of properties for which model-checking can be reduced to reachability testing in the sense outlined above. This result is obtained as a corollary of a stronger statement pertaining to the compositionality of the property language considered in this study. In particular, it is shown that our language is the least expressive compositional language that can express a simple safety property stating that no reject state can ever be reached.Finally, the property language characterizing the power of reachability testing is used to provide a definition of characteristic properties with respect to a timed version of the ready simulation preorder, for nodes of tau-free, deterministic timed automata. (C) 2002 Elsevier Science B.V. All rights reserved.