Challenges for integration of embedded FeRAMs in the sub-180 nm regime
Challenges for integration of embedded FeRAMs in the sub-180 nm regime
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DOI：
10.1080/10584580390258165
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发表时间：
2003-01-01
影响因子：
0.7
通讯作者：
Zambrano, R
中科院分区：
文献类型：
--
作者：
Zambrano, R
铁电存储器（FeRAM）越来越多地使用1T1C配置的堆叠单元。虽然这些都还没有真正投入生产，但与2T2C配置的捆绑单元相比，已经取得了很大的进展。然而，铁电存储器领域必须准备好面对发展过程中的又一个具有挑战性的步骤，即从平面电容器向三维电容器的转变。对于解决这个问题的最佳方法还没有达成共识，而在130纳米节点这可能是必须要解决的。本文回顾了最流行方法的局限性，然后开始比较两种可能的三维铁电电容（FeCap）结构（针状和杯状）。最后几节致力于介绍一种不同的策略，试图采用一种渐进式的方法。这是从开发一种采用0.35微米技术的“准平面”铁电电容开始的，这种电容在0.18微米节点可以演变成一种“准三维”的电容，而对于0.13微米（或更精细）的规则则可以成为一种真正的三维电容。
Ferroelectric memories (FeRAMs) are more and more using stack cells in 1T1C configuration. While none of these are already in real production, a great progress has been made when comparing these with strapped cells in 2T2C configuration. However the FeRAM community must be ready to face another challenging step in the evolution, i.e. the transition from planar to 3D capacitors. There's no consensus on the best approach to address this issue, which is probably a must at the 130 nm node.This paper reviews the limitations of the most popular approaches, then starts comparing two possible 3D FeCap structures (pin and cup-shaped). The final sections are dedicated to the introduction of a different strategy, trying to use a evolutionary approach. This is pursued starting with the development of a "quasi planar" FeCap in 0.35 mum technology that can evolve into a "quasi 3D" one at 0.18 mum node, and in a true one for 0.13 mum (or finer) rules.