Advancing supercomputer performance through interconnection topology synthesis
Advancing supercomputer performance through interconnection topology synthesis
复制标题
通过互连拓扑综合提高超级计算机性能
DOI：
10.1109/iccad.2008.4681630
复制
发表时间：
2008
期刊：
影响因子：
--
通讯作者：
Chung
中科院分区：
文献类型：
--
作者：
Yi Zhu;M. Taylor;S. Baden;Chung
在当今的众核时代，互连网络已经成为决定计算机系统性能的关键因素。在本文中，我们提出了一个设计流程，以发现最佳的拓扑结构的通信延迟和物理约束。首先为计算芯片之间的互连网络生成一组具有代表性的候选拓扑，然后设计一种有效的多商品流算法来评估性能。实验表明，我们的算法识别的最佳拓扑可以实现更好的平均延迟相比，现有的网络。
In todaypsilas many-core era, the interconnection networks have been the key factor that dominates the performance of a computer system. In this paper, we propose a design flow to discover the best topology in terms of the communication latency and physical constraints. First a set of representative candidate topologies are generated for the interconnection networks among computing chips; then an efficient multi-commodity flow algorithm is devised to evaluate the performance. The experiments show that the best topologies identified by our algorithm can achieve better average latency compared to the existing networks.