A Feasibility Study of Annealing Processor for Fully-connected Ising Model Based on Memristor/CMOS Hybrid Architecture
A Feasibility Study of Annealing Processor for Fully-connected Ising Model Based on Memristor/CMOS Hybrid Architecture
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基于忆阻器/CMOS混合架构的全连接Ising模型退火处理器的可行性研究
DOI:
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发表时间:
2018
期刊:
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通讯作者:
Masayuki Hiromoto and Takashi Sato
中科院分区:
文献类型:
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作者:
Shogo Matsumoto;Hidenori Gyoten;Masayuki Hiromoto and Takashi Sato