Specifying and verifying hardware for tamper-resistant software
Specifying and verifying hardware for tamper-resistant software
复制标题
指定和验证防篡改软件的硬件
DOI:
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发表时间:
2003
期刊:
影响因子:
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通讯作者:
M. Horowitz
中科院分区:
文献类型:
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作者:
D. Lie;John C. Mitchell;C. Thekkath;M. Horowitz
We specify a hardware architecture that supports tamper-resistant software by identifying an "idealized" model, which gives the abstracted actions available to a single user program. This idealized model is compared to a concrete "actual" model that includes actions of an adversarial operating system. The architecture is verified by using a finite-state enumeration tool (a model checker) to compare executions of the idealized and actual models. In this approach, software tampering occurs if the system can enter a state where one model is inconsistent with the other in performing the verification, we detected a replay attack scenario and were able to verify the security of our solution to the problem. Our methods were also able to verify that all actions in the architecture are required, as well as come up with a set of constraints on the operating system to guarantee liveness for users.