Some Remarks on the Use of Time-Varying Delay to Model Sample-and-Hold Circuits
Some Remarks on the Use of Time-Varying Delay to Model Sample-and-Hold Circuits
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DOI：
10.1109/tac.2007.899053
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发表时间：
2007-06
影响因子：
6.8
通讯作者：
L. Mirkin
中科院分区：
文献类型：
--
作者：
L. Mirkin
本文修正了非均匀采样数据系统控制的所谓输入延迟法，即把采样保持电路嵌入到具有时变输入延迟的模拟系统中。结果表明，在不考虑时变延迟嵌入的情况下，计算最大容许采样周期的保守性降低了57%。
This note revises the so-called input delay approach to the control of sampled-data systems with nonuniform sampling, in which the sample-and-hold circuit is embedded into an analog system with a time- varying input delay. It is shown that the conservatism in calculating the maximal admissible sampling period is reduced by about 57% if the time- varying delay embedding step is omitted.