A new architecture of programmable digital vision chip

A new architecture of programmable digital vision chip
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一种新架构的可编程数字视觉芯片

DOI:
10.1109/vlsic.2002.1015100
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发表时间:
2002
期刊:
2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)
影响因子:
--
通讯作者:
M. Ishikawa
M. Ishikawa
中科院分区:
--
文献类型:
--
作者:
T. Komuro;S. Kagami;M. Ishikawa

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本文提出了一种新的数字视觉芯片的体系结构,将光电探测器和数字电路中的并行处理元件集成在一起。在该体系结构中,引入了连接多个PE的功能,并实现了高速求和运算。文中还介绍了一些样例算法和我们研制的/SPL时间/像素原型芯片。
In this paper we propose a new architecture of digital vision chip, in which photo detectors and parallel processing elements designed in digital circuits are integrated together. In this architecture, the function to join several PEs is introduced and summation is calculated at high speed. Also, some sample algorithms and a 64/spl times/64 pixels prototype chip we developed will be described.
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DOI: --
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