Inversion Boundary Annihilation in GaAs Monolithically Grown on On‐Axis Silicon (001)
Inversion Boundary Annihilation in GaAs Monolithically Grown on On‐Axis Silicon (001)
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DOI：
10.1002/adom.202000970
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发表时间：
2020-09
影响因子：
9
通讯作者：
Keshuang Li;Junjie Yang;Ying Lu;M. Tang;P. Jurczak;Zizhuo Liu;Xuezhe Yu;Jae-Seong Park;H. Deng;H. Jia;Manyu Dang;A. Sánchez;R. Beanland;Wei Li;Xiaodong Han;Jinchuan Zhang;Huan Wang;Fengqi Liu;Siming Chen;A. Seeds;P. Smowton;Huiyun Liu
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文献类型：
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作者：
Keshuang Li;Junjie Yang;Ying Lu;M. Tang;P. Jurczak;Zizhuo Liu;Xuezhe Yu;Jae-Seong Park;H. Deng;H. Jia;Manyu Dang;A. Sánchez;R. Beanland;Wei Li;Xiaodong Han;Jinchuan Zhang;Huan Wang;Fengqi Liu;Siming Chen;A. Seeds;P. Smowton;Huiyun Liu
III-V族材料和器件在CMOS兼容的同轴Si（001）衬底上的单片集成实现了低成本、高密度硅基光子集成电路的发展。反型边界（IB）是由 III-V 族材料和 Si 之间的界面产生的缺陷，这使得在 Si 上生产高质量的 III-V 族器件几乎不可能。本文展示了一种新技术，通过在硅表面实现交替的直线和曲折单原子台阶，实现在轴上 Si (001) 衬底上单片生长无 IB GaAs，而无需使用双 Si 原子台阶，这此前被认为是 Si 上无 IB III-V 族生长的关键。 Si表面周期性的笔直和蜿蜒的单原子台阶是Si缓冲层高温退火的结果。此外，电子泵浦量子点激光器已在该无 IB GaAs/Si 平台上得到验证，最高工作温度为 120 °C。这些结果可能是朝着 III-V 族材料和器件与成熟 CMOS 技术的单片集成迈出的重要一步。
Monolithic integration of III–V materials and devices on CMOS compatible on‐axis Si (001) substrates enables a route of low‐cost and high‐density Si‐based photonic integrated circuits. Inversion boundaries (IBs) are defects that arise from the interface between III–V materials and Si, which makes it almost impossible to produce high‐quality III–V devices on Si. In this paper, a novel technique to achieve IB‐free GaAs monolithically grown on on‐axis Si (001) substrates by realizing the alternating straight and meandering single atomic steps on Si surface has been demonstrated without the use of double Si atomic steps, which was previously believed to be the key for IB‐free III–V growth on Si. The periodic straight and meandering single atomic steps on Si surface are results of high‐temperature annealing of Si buffer layer. Furthermore, an electronically pumped quantum‐dot laser has been demonstrated on this IB‐free GaAs/Si platform with a maximum operating temperature of 120 °C. These results can be a major step towards monolithic integration of III–V materials and devices with the mature CMOS technology.