Self-depleted T-gate Schottky barrier tunneling FET with low average subthreshold slope and high ION/IOFF by gate configuration and barrier modulation
Self-depleted T-gate Schottky barrier tunneling FET with low average subthreshold slope and high ION/IOFF by gate configuration and barrier modulation
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DOI：
10.1109/iedm.2011.6131564
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发表时间：
2011-12
期刊：
影响因子：
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通讯作者：
Qianqian Huang;Zhan Zhan-Zhan;Ru Huang;Xiang Mao;Lijie Zhang;Y. Qiu;Yangyuan Wang
中科院分区：
文献类型：
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作者：
Qianqian Huang;Zhan Zhan-Zhan;Ru Huang;Xiang Mao;Lijie Zhang;Y. Qiu;Yangyuan Wang
提出并实验验证了一种新型的硅基T栅肖特基势垒隧穿场效应晶体管（TSB-TFET）。通过在源极侧通过栅极配置增强电场以获得更陡的亚阈值斜率（SS），具有自耗尽结构的器件可以有效地抑制漏电流，同时实现肖特基势垒隧穿电流占主导地位的高导通电流而没有面积代价，这可以缓解硅TFET中的问题。此外，与传统TFET相比，所提出的TSB-TFET可以具有相当的DIBL效应和减小的栅漏电容。进一步的器件优化实验实现了相同的足迹和势垒调制掺杂剂隔离肖特基技术的扩展多指栅配置。采用兼容的体CMOS技术，所制造的器件可以在近50年的电流中实现陡峭的SS，以及高ION/IOFF比（107）。所提出的器件具有高兼容性，是非常有前途的未来低功耗系统的应用。
In this paper, a novel silicon-based T-gate Schottky barrier tunneling FET (TSB-TFET) is proposed and experimentally demonstrated. With enhanced electric field at source side through gate configuration for steeper subthreshold slope (SS), the device with self-depleted structure can effectively suppress the leakage current and simultaneously achieve the dominant Schottky barrier tunneling current for high ON-current without area penalty, which can alleviate the problems in silicon TFET. In addition, the proposed TSB-TFET can have comparable DIBL effect and reduced gate-to-drain capacitance compared with traditional TFET. Further device optimization is experimentally achieved by extended multi-finger gate configuration of the same footprint and barrier modulation by dopant segregation Schottky technology. With compatible bulk CMOS technology, the fabricated device can achieve steep SS over almost 5 decades of current, as well as high ION/IOFF ratio (∼107). The proposed device with high compatibility is very promising for future low power system applications.