Optical Leakage Mitigation in Ortho-Mode Transducer Detectors for Microwave Applications

Optical Leakage Mitigation in Ortho-Mode Transducer Detectors for Microwave Applications
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用于微波应用的正交模式传感器探测器中的光泄漏缓解

DOI:
10.1007/s10909-022-02733-9
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发表时间:
2022
影响因子:
2
通讯作者:
Gualtieri R
Gualtieri R
中科院分区:
物理与天体物理3区
文献类型:
--
作者:
Gualtieri R

文献摘要

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平面正交模式换能器(OMT)是在波导与片上电路和检测器之间耦合光信号的常用方法。虽然理想的OMT-波导耦合需要对波导的最小干扰,但是当用于毫米波应用时,波导通常由两个部分构成,以允许OMT探针插入波导中。波导中的这种断裂是信号泄漏的来源,并且可能导致性能损失和增加的实验系统误差。在这里,我们报告的发展,新的OMT波导耦合结构的目标是减少泄漏的检测器晶片接口。由于耦合波导和背短路之间的差距而导致的像素到像素的光泄漏借助于突出部来减小,该突出部穿过OMT膜并且电连接晶片的任一侧上的两个波导部分。高频电磁场模拟表明,相对于标准OMT耦合结构,这些凸起是一种有效的方法,可以将差距中的光泄漏减少%,填充因子为%。原型器械的设计旨在使用具有不同填充因子的相对测量来表征新设计的性能。我们概述了模拟设置和结果,并提出了一个芯片布局和样品盒,将用于执行初始测量。
Planar ortho-mode transducers (OMTs) are a commonly used method of coupling optical signals between waveguides and on-chip circuitry and detectors. While the ideal OMT–waveguide coupling requires minimal disturbance to the waveguide, when used for mm-wave applications the waveguide is typically constructed from two sections to allow the OMT probes to be inserted into the waveguide. This break in the waveguide is a source of signal leakage and can lead to loss of performance and increased experimental systematic errors. Here, we report on the development of new OMT-to-waveguide coupling structures with the goal of reducing leakage at the detector wafer interface. The pixel-to-pixel optical leakage due to the gap between the coupling waveguide and the backshort is reduced by means of a protrusion that passes through the OMT membrane and electrically connects the two waveguide sections on either side of the wafer. High-frequency electromagnetic simulations indicate that these protrusions are an effective method to reduce optical leakage in the gap bypercent, with afilling factor, relative to an standard OMT coupling architecture. Prototype devices have been designed to characterize the performance of the new design using a relative measurement with varying filling factors. We outline the simulation setup and results and present a chip layout and sample box that will be used to perform the initial measurements.