Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC
Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC
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DOI：
10.1109/access.2024.3363913
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发表时间：
2024
期刊：
影响因子：
3.9
通讯作者：
M. Vemuri;Umamaheswara Rao Tida
中科院分区：
文献类型：
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作者：
M. Vemuri;Umamaheswara Rao Tida
晶体管级单片三维集成电路 (M3D-IC) 技术潜力受到金属层间通孔 (MIV) 造成的硅占用空间开销的影响。为了解决这个问题，我们提出了一种双用途 MIV 设备利用，其中 MIV 有两个用途：1. 互连和 2. 设备终端。本文对所提出的 MIV 器件（特别是 MIV 电容器和 MIV 晶体管）进行了详细研究，并提出了提取 3 级 Spice 模型的策略。仿真结果表明，与 M3D-IC 技术中的传统晶体管级实现相比，利用 MIV 器件的机会性利用设计的基本逻辑门可将基板利用率降低高达 22%。
Transistor-level monolithic three-dimensional integrated circuit (M3D-IC) technology potential is compromised with the silicon footprint overhead caused by metal inter-layer via (MIV). To address this issue, we present a dual-purpose MIV-device utilization where MIV serves two purposes: 1. interconnect and 2. device terminal. A detailed study of the proposed MIV-devices specifically MIV-capacitor and MIV-transistor is performed and a strategy to extract level-3 Spice models is presented in this paper. Simulation results suggest that the basic logic gates designed with the opportunistic utilization of MIV-devices reduce the substrate utilization by up to 22% compared with the conventional transistor-level implementation in M3D-IC technology.