2.5 Gbit/s PRBS Generator and Checker
2.5 Gbit/s PRBS Generator and Checker
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2.5 Gbit/s PRBS 发生器和检查器
DOI:
10.1109/elmar.2006.329585
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发表时间:
2006
期刊:
影响因子:
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通讯作者:
S. Tomažič
中科院分区:
文献类型:
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作者:
L. Pavlovič;Matjaz Vidmar;S. Tomažič
A novel approach in the implementation of a high-speed linear-feedback shift register (LFSR) using a single D-flip-flop is presented. A PRBS data generator and checker using discrete-logical devices are presented as an example. Due to the discrete-logical components used, special device-interconnection techniques must be used to reduce the signal-integrity problems and optimize the device interconnection for optimal system performance