A new statistical approach to timing analysis of VLSI circuits
A new statistical approach to timing analysis of VLSI circuits
复制标题
VLSI 电路时序分析的新统计方法
DOI：
10.1109/icvd.1998.646657
复制
发表时间：
1998
期刊：
影响因子：
--
通讯作者：
Meng
中科院分区：
文献类型：
--
作者：
Rung;Meng
本文提出了一种新的统计时序分析问题定义。两个有效的方法，考虑只占主导地位的长路径来处理这个问题。详细研究了节点时延的相关性对最长路径时延概率分布的影响。实验结果表明，最长路径延迟的概率分布受节点的相关性和多个主导长路径的存在的影响很大。结果还表明，我们的方法得到的概率分布很好地跟踪到整个电路模拟得到的分布，与更少的计算时间。
In this paper a new problem definition of statistical timing analysis is formulated. Two efficient methods that consider only dominant long paths are employed to approach this problem. The influence of the correlation of node delays on the probability distribution of the longest path delay is studied in detail. The experimental results show that the probability distribution of the longest path delay is greatly influenced by the correlation of nodes and by the presence of many dominant long paths. The results also show that the probability distribution obtained by our approaches is well tracked to the distribution obtained by the whole circuit simulation with much less computation time.