Superior subthreshold slope of gate-all-around (GAA) p-type poly-Si junctionless nanowire transistors with highly suppressed grain boundary defects

Superior subthreshold slope of gate-all-around (GAA) p-type poly-Si junctionless nanowire transistors with highly suppressed grain boundary defects
复制标题

具有高度抑制晶界缺陷的环栅 (GAA) p 型多晶硅无结纳米线晶体管的卓越亚阈值斜率

DOI:
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发表时间:
2020
期刊:
影响因子:
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通讯作者:
and Toshiro Hiramoto
and Toshiro Hiramoto
中科院分区:
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文献类型:
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作者:
Min-Ju Ahn;Takuya Saraya;Masaharu Kobayashi;and Toshiro Hiramoto

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