X-tolerant compression and application of scan-atpg patterns in a bist architecture
X-tolerant compression and application of scan-atpg patterns in a bist architecture
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X 容错压缩以及 scan-atpg 模式在双元架构中的应用
DOI：
10.1109/test.2003.1270902
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发表时间：
2003
期刊：
影响因子：
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通讯作者：
M. Amin
中科院分区：
文献类型：
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作者：
P. Wohl;J. Waicukauski;Sanjay B. Patel;M. Amin
提出了一种新的X容限确定性内建自测试（XDBIST）方法，该方法有效地压缩和应用了由自动测试模式生成（ATPG）产生的扫描模式，并将其应用于逻辑内建自测试结构中。我们的方法允许测试模式有任何数量的未知值，而不会降低压缩和应用程序的效率。XDBIST不需要改变被测器件（DUT）的核心逻辑;不需要插入测试点或X阻塞逻辑。该解决方案保证了与确定性扫描ATPG相同的高测试覆盖率和诊断能力，并使用相同的测试流程，同时将测试数据量和测试周期减少了10倍以上。
We present X-tolerant deterministic BIST (XDBIST), a novel method to efficiently compress and apply scan pattems generated by automatic test pattern generation (ATPG) in a logic built-in self-test architecture. Our method allows test patterns to have any number of unknown values with no degradation in compression and application efficiency. XDBIST does not require changing the core logic of the device under test (DUT); no test points or X-blockage logic need be inserted. The proposed solution guarantees the same high test coverage and diagnosis ability as deterministic scan-ATPG and uses the same tester flow, while reducing test data volume and tester cycles by more than 10 times.