Register promotion by sparse partial redundancy elimination of loads and stores
Register promotion by sparse partial redundancy elimination of loads and stores
复制标题
通过加载和存储的稀疏部分冗余消除来提升寄存器
DOI：
10.1145/277650.277659
复制
发表时间：
1998
期刊：
影响因子：
--
通讯作者：
P. Tu
中科院分区：
文献类型：
--
作者：
Fred C. Chow;Robert Kennedy;Shin;R. Lo;P. Tu
寄存器提升的算法提出的基础上的观察，促进一个存储器位置的值寄存器的情况下，其中程序表现出部分冗余访问的存储器位置之间的情况相吻合。最近的SSAPRE算法，用于消除部分冗余使用稀疏SSA表示本算法的基础，以消除存储器访问之间的冗余，使我们能够实现计算和生活范围最优在我们的寄存器提升结果。我们讨论了如何在SSAPRE框架中实现推测性代码运动。我们提出了两种不同的算法进行投机代码运动：保守的投机算法中使用的配置文件数据的情况下，和配置文件驱动的投机算法时，配置文件数据可用。我们定义的静态单次使用（SSU）的形式和开发的双重SSAPRE算法，称为SSUPRE，执行部分冗余消除商店。我们提供测量数据SPECint95基准套件，以证明我们的寄存器提升方法在删除负载和存储的有效性。我们还研究了不同的投机代码运动策略时，适用于标量加载和存储的相对性能。
An algorithm for register promotion is presented based on the observation that the circumstances for promoting a memory location's value to register coincide with situations where the program exhibits partial redundancy between accesses to the memory location. The recent SSAPRE algorithm for eliminating partial redundancy using a sparse SSA representation forms the foundation for the present algorithm to eliminate redundancy among memory accesses, enabling us to achieve both computational and live range optimality in our register promotion results. We discuss how to effect speculative code motion in the SSAPRE framework. We present two different algorithms for performing speculative code motion: the conservative speculation algorithm used in the absence of profile data, and the the profile-driven speculation algorithm used when profile data are available. We define the static single use (SSU) form and develop the dual of the SSAPRE algorithm, called SSUPRE, to perform the partial redundancy elimination of stores. We provide measurement data on the SPECint95 benchmark suite to demonstrate the effectiveness of our register promotion approach in removing loads and stores. We also study the relative performance of the different speculative code motion strategies when applied to scalar loads and stores.