Optimized Polynomial Multiplier Architectures for Post-Quantum KEM Saber

Optimized Polynomial Multiplier Architectures for Post-Quantum KEM Saber
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后量子 KEM Sabre 的优化多项式乘法器架构

DOI:
10.1109/dac18074.2021.9586219
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发表时间:
2021
期刊:
2021 58th ACM/IEEE Design Automation Conference (DAC)
影响因子:
--
通讯作者:
S. Roy
S. Roy
中科院分区:
--
文献类型:
--
作者:
Andrea Basso;S. Roy

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Saber是正在进行的NIST后量子密码学标准化项目的四名决赛入围者之一。Saber的计算时间的很大一部分都花在计算模为2的幂的多项式环中的多项式乘法上。针对不同的硬件平台和不同的应用目标,我们提出了几种优化策略,以提高Saber多项式乘法器架构的性能。我们提出了两个高速架构,利用Saber中操作数多项式的小,可以实现很大的性能与适度的面积消耗。我们还提出了一个轻量级的乘法器,仅消耗541 LUT和301 FF的小型阿蒂克斯-7 FPGA。
Saber is one of the four finalists in the ongoing NIST post-quantum cryptography standardization project. A significant portion of Saber's computation time is spent on computing polynomial multiplications in polynomial rings with powers-of-two moduli. We propose several optimization strategies for improving the performance of polynomial multiplier architectures for Saber, targeting different hardware platforms and diverse application goals. We propose two high-speed architectures that exploit the smallness of operand polynomials in Saber and can achieve great performance with a moderate area consumption. We also propose a lightweight multiplier that consumes only 541 LUTs and 301 FFs on a small Artix-7 FPGA.
DOI: --
发表时间: 2020
期刊: IACR Cryptol. ePrint Arch.
影响因子: --
作者:
V. Dang;Farnoud Farahmand;Michal Andrzejczak;Kamyar Mohajerani;D. Nguyen;K. Gaj
通讯作者: V. Dang;Farnoud Farahmand;Michal Andrzejczak;Kamyar Mohajerani;D. Nguyen;K. Gaj