Just-in-time Quantum Circuit Transpilation Reduces Noise
Just-in-time Quantum Circuit Transpilation Reduces Noise
复制标题
DOI：
10.1109/qce49297.2020.00050
复制
发表时间：
2020-05
期刊：
影响因子：
--
通讯作者：
E. Wilson;Sudhakar Singh;F. Mueller
中科院分区：
文献类型：
--
作者：
E. Wilson;Sudhakar Singh;F. Mueller
在当今嘈杂的中尺度量子（NISQ）设备上运行量子程序充满了挑战。其中许多挑战源于测量过程中的快速退相干和噪声、量子位连接、串扰、量子位本身以及通过门的量子位状态转换所产生的误差特性。量子位不仅不是“生来平等”的，而且它们的噪声水平也会随着时间而变化。据说IBM每天校准他们的量子系统一次，并在校准时报告噪声水平（误差）。这些信息随后被用于将电路映射到更高质量的量子位和连接到下一个校准点。这项工作提供了证据，证明在日常校准周期中还有改进的空间。它提供了一种在执行一个或多个敏感电路之前立即测量与量子位相关的噪声水平（误差）的技术，并表明实时噪声测量可以受益于后期物理量子位映射。通过这种及时重新校准的编译，结果的保真度比IBM的默认映射得到了改进，后者只使用它们的日常校准。该框架评估了两个主要的噪声源，即读出误差（测量误差）和双量子位门/连接误差。实验表明，基于应用执行前误差测量的实时电路映射，电路结果的精度平均提高了3-304%，最高可提高400%。
Running quantum programs is fraught with challenges on on today's noisy intermediate scale quantum (NISQ) devices. Many of these challenges originate from the error characteristics that stem from rapid decoherence and noise during measurement, qubit connections, crosstalk, the qubits themselves, and transformations of qubit state via gates. Not only are qubits not “created equal”, but their noise level also changes over time. IBM is said to calibrate their quantum systems once per day and reports noise levels (errors) at the time of such calibration. This information is subsequently used to map circuits to higher quality qubits and connections up to the next calibration point. This work provides evidence that there is room for improvement over this daily calibration cycle. It contributes a technique to measure noise levels (errors) related to qubits immediately before executing one or more sensitive circuits and shows that just-in-time noise measurements can benefit late physical qubit mappings. With this just-in-time recalibrated transpilation, the fidelity of results is improved over IBM's default mappings, which only uses their daily calibrations. The framework assess two major sources of noise, namely readout errors (measurement errors) and two-qubit gate/connection errors. Experiments indicate that the accuracy of circuit results improves by 3–304% on average and up to 400% with on-the-fly circuit mappings based on error measurements just prior to application execution.