Switched-current circuits in digital CMOS technology with low charge-injection errors
Switched-current circuits in digital CMOS technology with low charge-injection errors
复制标题
采用数字 CMOS 技术的开关电流电路,具有低电荷注入误差
DOI:
10.1109/jssc.2002.803019
复制
发表时间:
2002
期刊:
影响因子:
--
通讯作者:
P. Allen
中科院分区:
文献类型:
--
作者:
G. Balachandran;P. Allen
In this paper, digital CMOS switched-current (SI) circuits with low charge-injection errors are presented. These circuits are based on the operation of the switches at virtual-ground nodes to result in signal-independent charge injection. Based on this scheme, different topologies for the memory cell are discussed. To verify the theoretical concepts developed, a third-order elliptic low-pass SI filter is implemented in a 0.25-/spl mu/m digital CMOS process. The filter nominally operates with a clock frequency of 10 MHz, cutoff frequency of 1 MHz, and a power supply of 2.3 V, while consuming 29 mW of power and processing input signals as large as 600-/spl mu/A peak differential. The low-charge injection nature of the circuit is reflected in its low total harmonic distortion of -59 dB for a 0.3-MHz signal with a modulation index of 0.5.