An Optimal Design Method for Complementary Metal Oxide Semiconductor Even-Stage Ring Oscillators Containing Latches

An Optimal Design Method for Complementary Metal Oxide Semiconductor Even-Stage Ring Oscillators Containing Latches
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含锁存器的互补金属氧化物半导体偶数级环形振荡器的优化设计方法

DOI:
10.1143/jjap.49.04de15
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发表时间:
2010
影响因子:
1.5
通讯作者:
Kazuyuki Nakamura
Kazuyuki Nakamura
中科院分区:
物理与天体物理4区
文献类型:
--
作者:
Yusuke Kohara;M. Asano;Y. Kawakami;Y. Uchida;H. Koike;Kazuyuki Nakamura

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介绍了一种由偶级反相器组成的互补金属氧化物半导体(CMOS)环形振荡器的设计方法。首先,我们提出了一种定量评价偶级环形振荡器振荡稳定性的方法。该方法通过观察振荡器与静态随机存取存储器(SRAM)单元电路的相似性,利用静态噪声容限分析来评估SRAM单元的数据存储稳定性。接下来,将该方法扩展到具有多个锁存器的振荡器。最后,通过对振荡稳定性的分析,我们发现通过增加多个单通道锁存电路,以及适当地设计它们的极性和插入位置,可以极大地扩大稳定振荡条件的范围。通过蒙特卡罗模拟表明,优化后的振荡器电路在工艺、电压和温度波动以及器件特性变化下具有很好的稳健性。
This paper describes a design method for complementary metal oxide semiconductor (CMOS) ring oscillators composed of even-stage inverters. First, we propose a quantitative method to evaluate oscillation stability for an even-stage ring oscillator with a CMOS latch. The method uses static noise margin analysis to evaluate the static random access memory (SRAM) cell's data storage stability, by observing the similarity between the oscillator and SRAM cell circuitry. Next, the method is extended to oscillators with multiple latches. Finally, by analyzing oscillation stability using this method, we find that the range of stable oscillation conditions can be drastically widened by adding multiple single-channel latch circuits, and also by an appropriate design of their polarities and insertion positions. We also clarify through Monte Carlo simulations, that the optimized oscillator circuit is robust under process, voltage and temperature fluctuations and device characteristic variations.