Accurate CUDA performance modeling for sparse matrix-vector multiplication
Accurate CUDA performance modeling for sparse matrix-vector multiplication
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DOI：
10.1109/hpcsim.2012.6266964
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发表时间：
2012-07
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通讯作者：
Ping Guo;Liqiang Wang
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文献类型：
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作者：
Ping Guo;Liqiang Wang
本文提出了一种集成的基于分析和概要文件的CUDA性能建模方法，以准确预测CSR， ELL， COO和HYB SpMV CUDA内核的稀疏矩阵向量乘法的内核执行时间。基于我们在NVIDIA Tesla C2050上对8个广泛使用的测试矩阵进行的实验，我们的模型预测的执行时间与NVIDIA SpMV实现的实际执行时间非常匹配。具体来说，对于32个测试用例中的29个，性能差异在7%以下或左右。对于其余3个测试用例，差异在8%到10%之间。对于CSR、ELL、COO和HYB SpMV内核，平均差异分别为4.2%、5.2%、1.0%和5.7%。
This paper presents an integrated analytical and profile-based CUDA performance modeling approach to accurately predict the kernel execution times of sparse matrix-vector multiplication for CSR, ELL, COO, and HYB SpMV CUDA kernels. Based on our experiments conducted on a collection of 8 widely-used testing matrices on NVIDIA Tesla C2050, the execution times predicted by our model match the measured execution times of NVIDIA's SpMV implementations very well. Specifically, for 29 out of 32 test cases, the performance differences are under or around 7%. For the rest 3 test cases, the differences are between 8% and 10%. For CSR, ELL, COO, and HYB SpMV kernels, the differences are 4.2%, 5.2%, 1.0%, and 5.7% on the average, respectively.