Analog CMOS deterministic Boltzmann circuits
Analog CMOS deterministic Boltzmann circuits
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模拟 CMOS 确定性玻尔兹曼电路
DOI：
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发表时间：
1993
期刊：
影响因子：
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通讯作者：
H. Card
中科院分区：
文献类型：
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作者：
C. Schneider;H. Card
CMOS电路实现了一个模拟神经网络（ANN）与片上确定性玻尔兹曼学习（DBL）和电容性突触重量存储的设计，制造和测试。通过定期重复训练数据来刷新权重。这些电路被用来构建一个12个神经元、132个突触的ANN，该ANN在各种学习实验中表现良好，包括36个输入到4个输出的映射问题。自适应系统，如这里所描述的那些可以补偿的缺陷，从他们的组成部分，因此可以建立使用简单的硅面积有效的模拟电路。测试结果表明，确定性玻尔兹曼人工神经网络可以有效地实现使用模拟CMOS电路。>
CMOS circuits implementing an analog neural network (ANN) with on-chip deterministic Boltzmann learning (DBL) and capacitive synaptic weight storage have been designed, fabricated, and tested. Weights are refreshed by periodic repetition of the training data. The circuits were used to build a 12-neuron, 132-synapse ANN that performed well in a variety of learning experiments, including a 36-input to 4-output mapping problem. Adaptive systems such as those described here can compensate for imperfections in the components from which they are constructed and therefore can be built using simple silicon area-efficient analog circuits. The test results indicate that deterministic Boltzmann ANNs can be implemented efficiently using analog CMOS circuitry. >