Using Abstract Specifications to Verify PowerPCTM Custom Memories by Symbolic Trajectory Evaluation
Using Abstract Specifications to Verify PowerPCTM Custom Memories by Symbolic Trajectory Evaluation
复制标题
使用抽象规范通过符号轨迹评估来验证 PowerPCTM 自定义存储器
DOI:
10.1007/3-540-44798-9_30
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发表时间:
2001
期刊:
影响因子:
--
通讯作者:
M. Abadir
中科院分区:
文献类型:
--
作者:
J. Bhadra;Andrew K. Martin;J. Abraham;M. Abadir
We present a methodology in which the behavior of a switch level device is specified using abstract parameterized regular expressions. These specifications are used to generate a finite automaton representing an abstraction of the behavior of a blockof memory comprised of a set of such switch level devices. The automaton, in conjunction with an Efficient Memory Model [1], [2] for the devices, forms a symbolic simulation model representing an abstraction of the array core embedded in a larger design under analysis. Using Symbolic Trajectory Evaluation, we checkthe equivalence between a register transfer level description and a schematic description augmented with abstract specifications for one of the custom memories embedded in the MPC7450 PowerPC processor.