A digital CMOS imager with pixel level analog-to-digital converter and reconfigurable SRAM/counter
A digital CMOS imager with pixel level analog-to-digital converter and reconfigurable SRAM/counter
复制标题
具有像素级模数转换器和可重新配置 SRAM/计数器的数字 CMOS 成像器
DOI：
10.1109/iwsoc.2004.1319845
复制
发表时间：
2004
期刊：
影响因子：
--
通讯作者：
A. Bermak
中科院分区：
文献类型：
--
作者：
Yat;A. Bermak
本文提出了一种基于脉宽调制（PWM）技术的像素级模数转换器CMOS图像传感器。数字像素传感器包括新颖的数字电路，其允许将内部8位存储器配置为4位计数器/存储器，以便将路由到每个像素的数据位线从8位减少到4位。因此，减少了与全局数据总线线路的切换活动相关联的总寄生电容以及功耗。除了8位精度外，成像器还可以配置为4位精度，以实现低分辨率帧速率并降低整体功耗。采用Alcatel0.35/spl μ/mCMOS工艺实现了原型芯片。每个像素占据46/spl mu/m x 48/spl mu/m的面积，填充因子为14%。
In this paper a CMOS image sensor with on-pixel analog-to-digital converter based on PWM scheme is proposed. The digital pixel sensor includes a novel digital circuit which allows to configure the internal 8-bit memory as a 4-bit counter/memory, so as to reduce the data bit lines routed to each pixel form 8-bit to 4-bit. Hence the total parasitic capacitance as well as power consumption associated with the switching activities of the global data bus lines are reduced. Besides 8-bit precision, the imager can also be configured to 4-bit precision for low resolution frame rate and decreasing overall power consumption. A prototype chip was realized in Alcatel 0.35/spl mu/m CMOS technology. Each pixel occupies an area of 46/spl mu/m x 48/spl mu/m with a fill-factor of 14%.